Rebellions has partnered with Alphawave Semi's I/O chiplets to enhance performance and scalability for hyperscale AI workloads, promoting innovation through energy-efficient, modular solutions.

Demonstrations include the industry’s first PCIe 6/1.6T Ethernet I/O chiplet, 128 Gbps PCIe 7.0 over copper, and advanced optical interconnects for AI, HPC, and hyperscale data centers.

Alphawave Semi has unveiled the availability of the industry’s first 3nm silicon-proven Universal Chiplet Interconnect Express (UCIe) Die-to-Die (D2D) IP subsystem, built on TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging technology.

Alphawave Semi has announced an extension of its collaboration with InnoLight Technology, the leader in data center and AI networking optics, with a demonstration of next generation low power, low latency linear pluggable optics (LPO).

Demonstrations highlighting leadership in PCIe over Optics, Ethernet, PCIe and UCIe SerDes on 3nm TSMC CoWoS packaging. Dr. Tony Chan Carusone to present workshop on I/O for AI clusters.

Alphawave Semi has announces its CTO, Dr. Tony Chan Carusone, will deliver a speech on chiplets and connectivity at the 2024 AI Hardware & Edge AI Summit.

Multi-protocol subsystem IP provides 8 Tbps/mm bandwidth density with D2D data rate of 24 Gbps for hyperscaler, HPC and AI applications.

Join Alphawave Semi for a Free Live-Streamed Event to Explore Opportunities Enabled by Chiplet-Based Systems.