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World’s First Multicore Avionics Certification to CAST-32A Uses the INTEGRITY-178 tuMP Multicore RTOS

Green Hills Software has announced that the INTEGRITY®-178 tuMP multicore real-time operating system (RTOS) is the first operating system to be part of a multicore certification to RCTA/DO-178C and CAST-32A.

World’s First Multicore Avionics Certification to CAST-32A Uses the INTEGRITY-178 tuMP Multicore RTOS
CMC Electronics’ PS-3000 Avionics Computer running INTEGRITY-178 tuMP

The certification is part of a Technical Standing Order (TSO) authorisation for CMC Electronics’ PU-3000 Avionics Computer, and the TSO submission included evidence of meeting all CAST-32A requirements for multicore processors.

“CMC Electronics selected the INTEGRITY-178 tuMP RTOS after determining that it uniquely provides the robust partitioning, resource configuration, and certification support required for CMC’s next generation of multicore avionics products,” said Don Paolucci, Vice President, Engineering, at CMC Electronics. “INTEGRITY-178 tuMP reduces development and integration costs for CMC and our customers by providing full support for multicore processing with mixed-criticality applications up to DO-178C DAL A airborne safety requirements and certified conformance to the FACE Technical Standard.”

“Green Hills Software is proud to be part of the world’s first certified multicore avionics solution with a multicore operating system,” said Dan O'Dowd, Founder and Chief Executive Officer of Green Hills Software. “We designed INTEGRITY-178 tuMP as a multicore RTOS from the beginning, and our 80 staff-year investment in multicore robust partitioning has paid off for our customers and their customers. While other companies have talked about getting a multicore certification for almost three years, CMC has actually achieved it using INTEGRITY-178 tuMP.”

The PU-3000 series of avionics computers is the fourth generation of avionics computers from CMC Electronics and is fit for the civil and military retrofit markets. Modular by design, the multicore PU-3000 can be used as a common computing platform in a large variety of functions allowing customers to simultaneously host combinations of several levels of applications into “one box” varying from primary flight display (PFD), navigation display (ND), flight management systems (FMS), radio management systems (RMS), flight director systems (FDS) to critical mission applications. CMC’s avionics computers are capable of hosting multiple high-demanding software applications developed to varying Design Assurance Levels, up to and including DAL A. The PU-3000 received authorisation as a Flight Director under TSO-C198 “Automatic Flight Guidance and Control System (AFGCS) Equipment.” The TSO was approved by Transport Canada Civil Aviation (TCCA), with reciprocal acceptance from the Federal Aviation Administration (FAA) and the European Aviation Safety Agency (EASA).

The INTEGRITY-178 tuMP high-assurance RTOS from Green Hills Software is the only RTOS that has actually been part of a multicore system certified to DO-178C airborne safety requirements. INTEGRITY-178 tuMP is a multicore RTOS with support for running a multi-threaded DAL A application across multiple processor cores in symmetric multi-processing (SMP) or bound multi-processing (BMP) configurations, as well as supporting the more basic asymmetric multi-processing (AMP). INTEGRITY-178 tuMP was the first RTOS to be certified conformant to the FACE Technical Standard, edition 3.0, and it is the only RTOS with multicore interference mitigation for all shared resources, enabling the system integrator to meet CAST-32A objectives.

Multicore interference happens when more than one processor core attempts simultaneous access of a shared resource, such as system memory, I/O, or the on-chip interconnect. The bandwidth allocation and monitoring (BAM) functionality in INTEGRITY-178 tuMP ensures that critical applications get their allocated access to shared resources in order to meet their required deadlines, significantly lowering integration and certification risk. Together, the flexible multi-processing architecture and the multicore interference mitigation enable a system integrator to maximise multicore processor performance while meeting safety and security requirements.

www.ghs.com

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