Cadence Design Systems, Inc., established in 1988 and headquartered in San Jose, California, is a global leader in electronic design automation (EDA) and intelligent system design. The company provides software, hardware, and silicon structures for designing integrated circuits and systems, enabling electronic product development across various industries. Cadence's offerings include custom IC design, digital design and signoff, functional verification, and system analysis, supporting sectors like consumer electronics, automotive, aerospace, and healthcare. Their commitment to innovation and collaboration has positioned them as a trusted partner in the semiconductor industry, facilitating the creation of cutting-edge electronic products worldwide.
Cadence Janus NoC enables design teams to achieve better PPA faster and with lower risk, freeing up valuable engineering resources for SoC differentiation.
The Helium Virtual and Hybrid Studio enables high-performance pre-silicon software validation in virtual and hybrid configurations for 5G, mobile, automotive, hyperscale and other markets.
Samsung and Cadence co-develop Mixed-Signal OpenAccess-ready PDKs that enable seamless implementation and verification of mixed-signal designs for data centers, networking, 5G, mobile, industrial and automotive applications.
Pegasus Verification System qualification enables customers to confidently perform physical verification for hyperscale, aerospace 5G communications, consumer and automotive designs.
Tensilica Xtensa processor IP with FlexLock capability independently certified for functional safety to ASIL-D and ready for use in the most safety-critical automotive applications.
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the delivery of the Cadence® Cerebrus Intelligent Chip Explorer, a new machine learning (ML)-based tool that automates and scales digital chip design, enabling customers to efficiently achieve demanding chip design goals.
Collaboration enables mutual customers to easily adopt the integrated Cadence digital full flow, which offers leading implementation and signoff technology for ultra-low power designs.
AWR V16 advances heterogeneous technology development for 5G wireless and connected systems for automotive, radar systems and semiconductor technologies. Custom RF to mmWave IP developed with AWR software is now accessible across Cadence design platforms, delivering seamless solutions for wireless systems. Foundational advance in IC, package and PCB RF workflows accelerates design turnaround time to align with customers’ end-market delivery time schedules. Fully integrated FEA solver technologies deliver accurate multiphysics (EM and thermal) systems analysis with near-linear scalability and capacity