Microchip Demonstrates PCIe Gen 6 Storage Architecture with Micron

Microchip Technology has demonstrated an end-to-end PCIe Gen 6 storage architecture integrating Switchtec PCIe Gen 6 switches with high-performance Micron 9650 NVMe solid-state drives (SSDs). The demonstration showcases high-bandwidth, low-latency storage connectivity engineered for artificial intelligence (AI), high-performance computing (HPC), and cloud data center workloads.

PCIe Gen 6 Storage Architecture Demonstration
At the 2026 Future of Memory and Storage (FMS) Conference, held in Santa Clara, California, from August 4 to 6, 2026, Microchip showcased a Switchtec Gen 6 PCIe fanout switch operating as a high-bandwidth, low-latency interconnect between host processors and multiple Micron 9650 NVMe SSDs. The architecture enables the drives to operate at full PCIe Gen 6 speeds while supporting composable and disaggregated system designs, allowing data center architects to scale storage resources efficiently.

Brian McCarson, corporate vice president and general manager of Microchip’s data center solutions business unit, stated that advancing data center performance requires a cohesive ecosystem approach, adding that bringing together complementary strengths in switching and storage enables scalable, high-bandwidth architectures for next-generation AI and cloud platforms.

Switch Microarchitecture and Security Protocols
PCIe 6.0 doubles PCIe 5.0 bandwidth to 64 GT/s per lane to support the movement of large data volumes across compute, memory, and storage resources. Microchip’s Switchtec Gen 6 PCIe switches are built on 3 nm process technology and feature high lane counts, advanced error containment, comprehensive diagnostics, and multicast functionality for efficient one-to-many data distribution across devices within a PCIe domain.

The switches enable high-speed connectivity between CPUs, GPUs, SoCs, AI accelerators, and storage devices while optimizing power consumption in demanding computing environments. To protect system integrity, the switches incorporate a hardware root of trust and secure boot architecture supported by post-quantum-safe cryptographic algorithms meeting Commercial National Security Algorithm (CNSA) 2.0 standards.

High-Throughput NVMe Storage Integration
Micron 9650 PCIe Gen 6 NVMe SSDs are designed to deliver high throughput, IOPS, and low latency for data-intensive workloads such as AI model training, real-time analytics, and large-scale databases. By combining Micron’s storage technology with Microchip’s switching capabilities, the solution provides a balanced storage fabric optimized for next-generation infrastructure.

Edited by Romila DSilva, Induportals Editor, with AI assistance.