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Keysight technologies News
Keysight to Showcase Solutions Designed to Accelerate AI Innovation at DesignCon 2025
Demonstrations will include emulation and test solutions for electrical and optical transmissions and data center interconnect applications up to speeds of 800G and 1.6T as well as design and simulation of chiplet interconnects.
www.keysight.com
At DesignCon 2025 (January 29-30), Keysight Technologies will showcase a range of solutions to accelerate the development of intelligent networks. Keysight will present several sessions at DesignCon 2025, including technical discussions and tutorials.
Demonstrations include:
- Chiplet PHY Designer: Keysight will showcase how designers can analyze and optimize performance bottlenecks for chiplet-based systems based on the UCIe and Bunch of Wires industry-standard interconnects.
- 1.6 Tbps Signal Integrity: This demo will highlight Keysight’s advanced signal integrity application software, which accelerates time to market for high-speed digital interconnects.
- Next Generation Memory Validation: Next generation measurement solutions require lower noise and reduced loading to reflect design performance accurately. Keysight will demo how this can be achieved through its new memory test application.
- 448 Gbps Research: Next generation interconnect architecture for high-performance AI clusters has rapidly advanced to 448 Gbps interfaces for 3.2Tbps systems. In this demo, Keysight will highlight its arbitrary waveform generator, which provides the versatility needed for complex real-world signal testing, enabling analysis and AI research.
- 800G AI Interconnect: Keysight will demonstrate how to measure optical and electrical interconnect BER to perform FEC error correction, which is essential for high data volume AI applications. Solutions include Keysight’s new interconnects and network performance tester, the benchtop PAM4 ethernet test system and Keysight’s solution for AI data centers.
Visit Keysight at booth number 1039, Santa Clara Convention Center.
