Single-Die Secure Mobile IC with Post-Quantum Cryptography

STMicroelectronics has introduced the ST54M, a single-die secure mobile chip engineered to meet emerging post-quantum cryptography (PQC) requirements for smartphones and personal electronics. The integrated circuit combines an NFC controller, an embedded secure element (eSE), and eSIM functionality to support connected services such as contactless payments, digital identity, and access control.

Hardware Acceleration for Post-Quantum Algorithms
The ST54M architecture features a dedicated hardware accelerator designed to process post-quantum cryptography algorithms, specifically supporting the ML-KEM and ML-DSA standards. This hardware engine facilitates the transition from hybrid cryptographic approaches to full post-quantum deployment, while concurrently protecting the secure element against side-channel and fault-injection attacks. The platform includes expanded memory capacity to host multiple concurrent applications and has completed certification testing for Common Criteria 2022 EUCC and EMVCo standards, with full production targeted for July 2026.

RF Integration and Antenna Optimization
Beyond its cryptographic capabilities, the single-die device integrates an enhanced radio frequency (RF) front end optimized for Near Field Communication (NFC). This RF architecture is engineered to improve reader-writer operation stability and allows the chip to function effectively with smaller antenna footprints and single-ended antenna configurations. These physical layer optimizations support the power and connectivity demands of advanced mobile environments, including mobile Point-of-Sale (mPOS) terminals, digital car key protocols, and wireless charging applications.

Additional Context: This section details technical specifications not included in the original announcement
In cryptographic engineering, the transition to Post-Quantum Cryptography (PQC) is driven by the threat of future quantum computers capable of executing Shor's algorithm, which can rapidly break the traditional asymmetric encryption (such as RSA and ECC) currently utilized in mobile secure elements. To counter this, NIST has standardized lattice-based cryptographic algorithms, including ML-KEM (Module-Lattice-Based Key-Encapsulation Mechanism) for secure key establishment, and ML-DSA (Module-Lattice-Based Digital Signature Algorithm) for digital signatures. Because these lattice-based algorithms require significantly larger key sizes and higher computational complexity—specifically involving complex polynomial matrix multiplications—compared to standard elliptic curves, executing them via software on a standard mobile microcontroller would introduce unacceptable latency during time-sensitive operations, such as NFC transit ticketing (which typically requires transaction times under 300 milliseconds). Therefore, a dedicated PQC hardware accelerator is critical to execute these advanced mathematical operations efficiently within the strict timing constraints and power budgets of mobile electronics.

Edited by Lekshman Ramdas, Induportals editor – adapted by AI.

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