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Infineon’s new HYPERRAM memory chip doubles bandwidth for low pin-count, high-performance solutions

Infineon Technologies AG has added HYPERRAM 3.0 to its portfolio of high-bandwidth, low-pin count memory solutions. The device features a new,16-bit extended version of the HyperBus interface that doubles throughput to 800 MBps.

Infineon’s new HYPERRAM™ memory chip doubles bandwidth for low pin-count, high-performance solutions
Infineon’s HYPERRAM™ 3.0 features a new,16-bit extended version of the HyperBus™ interface that doubles throughput to 800 MBps. The increased per-pin data throughput of the memory solution makes it possible to use microcontrollers (MCUs) with fewer pins and PCBs with fewer layers. This provides opportunities for lower-complexity and thus cost-optimized designs to support target applications.

With HYPERRAM 3.0, Infineon offers a portfolio of high-bandwidth memories with low pin-count and low-power. It is a perfect fit for applications requiring expansion RAM memory, including video buffering, factory automation, Artificial Intelligence of Things (AIoT) and automotive vehicle-to-everything (V2X), as well as applications requiring scratch-pad memory for intense mathematical calculations.

“With nearly three decades of memory solutions knowledge, we are excited to bring another industry-first to the market. The new HYPERRAM 3.0 memory solutions achieve a far higher throughput-per-pin than existing technologies in the market such as PSRAMs and SDR DRAMs,” said Ramesh Chettuvetty, Senior Director of Applications and Marketing at Infineon’s Automotive Division. “Our low-power features enable better power consumption, without sacrificing throughput, which also makes this memory ideal for industrial and IoT solutions.”

Infineon’s HYPERRAM is a stand-alone PSRAM-based volatile memory that offers a simple and cost-optimized way to add extension memory. The data rates are equivalent to SDR DRAM but with much lower pin-count and lower power requirements. The increased per-pin data throughput of the HyperBus interface makes it possible to use microcontrollers (MCUs) with fewer pins and PCBs with fewer layers. This provides opportunities for lower-complexity and thus cost-optimized designs to support target applications.

About HYPERRAM
Infineon introduced the first generation of HYPERRAM devices supporting the HyperBus interface in 2017. The second generation of HYPERRAM devices were introduced in 2021 and support both the Octal xSPI and HyperBus JEDEC-compliant interfaces with data rates of up to 400 MBps. The third generation of HYPERRAM devices support the new extended HyperBus interface enabling 800 MBps data rates. HYPERRAM devices are available in density range of 64 Mb to 512 Mb. They are AEC-Q100 qualified and support industrial and automotive temperature grades up to 125°C.

Availability
HYPERRAM 3.0 products can be ordered now in a BGA-49 package. More information is available at www.infineon.com/HYPERRAM.

www.infineon.com

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