HighTec and SiFive Expand Safety-Critical RISC-V Development

Automotive and industrial manufacturers are increasingly adopting software-defined architectures that require scalable processor platforms, functional safety compliance, and long-term software flexibility. In this context, HighTec EDV-Systeme and SiFive announced a collaboration focused on accelerating safety-ready RISC-V software development for embedded automotive and industrial applications.

Combining compiler toolchains with RISC-V processor IP
The partnership combines HighTec’s LLVM-based Rust and C/C++ compiler toolchains with SiFive’s safety-focused RISC-V processor IP portfolio. The integrated approach is intended to reduce software integration complexity for developers building safety-critical embedded systems.

The collaboration targets applications where functional safety, cybersecurity, and long product lifecycles are critical requirements, including automotive electronic control systems, industrial automation platforms, and other embedded computing environments.

RISC-V’s open instruction set architecture allows processor customization and software portability while reducing dependency on proprietary CPU architectures. As software-defined vehicle platforms and industrial control systems become more complex, developers are increasingly looking for open embedded software ecosystems that support both performance scaling and certification requirements.

Functional safety and cybersecurity alignment
HighTec’s Rust and C/C++ toolchains are qualified according to ISO 26262 up to ASIL D and also support ISO 21434 cybersecurity requirements. The toolchains are based on LLVM compiler technology and support hybrid software development workflows combining legacy C/C++ software with Rust-based application development.

The companies stated that the toolchains are optimized for SiFive’s RISC-V processor architectures and performance extensions. HighTec also provides a Qualification Kit intended to simplify software tool qualification and support certification processes for safety-critical applications.

SiFive’s automotive-oriented RISC-V processor IP portfolio was designed for applications requiring built-in support for functional safety and security mechanisms. The processor cores target automotive and industrial systems where certification readiness, deterministic behavior, and long operational lifecycles are important system requirements.

Supporting scalable embedded software platforms
The collaboration reflects broader industry movement toward open embedded software ecosystems and processor standardization in safety-critical systems. By combining qualified software toolchains with RISC-V processor IP, the companies aim to simplify migration toward scalable software-defined architectures.

The integrated development environment is intended to help embedded developers reduce integration effort, accelerate validation workflows, and shorten development cycles for safety-relevant RISC-V deployments across automotive and industrial automation applications.

Edited by Aishwarya Mambet, Induportals Editor, with AI assistance.

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