ROHM Targets Scalable Automotive SoC Power Design

Automotive compute platforms are moving from distributed electronic control units toward domain controller architectures, increasing demand for tightly managed low-voltage, high-current power delivery. ROHM’s latest configuration addresses this shift with a reusable power design approach for automotive SoCs used in advanced driver assistance, driver monitoring, camera sensing, and integrated cockpit systems.

Power Architecture for Domain Controller Electronics
The increasing computational requirements of automotive SoCs are driven by ADAS sensor fusion, higher-resolution in-vehicle imaging, and ECU consolidation into centralized compute architectures. These systems require multiple power rails, deterministic sequencing, and reliable transient response under variable processing loads.

Traditional automotive power supply designs are often customized for specific SoC vendors or processor generations. This can create redesign cycles during vehicle platform refreshes, increasing engineering validation effort and extending development schedules.

ROHM’s approach introduces a configurable power architecture built around combinations of PMICs and DrMOS stages, enabling a modular automotive data ecosystem for power delivery rather than fixed single-platform designs.

The architecture combines the BD968xxC PMIC family with the BD96340MFFC DrMOS component. Depending on SoC performance requirements, the design can scale from standalone PMIC implementations for lower-power processors to PMIC-plus-DrMOS configurations for high-current compute platforms.

Configurable PMIC Design for Automotive SoC Variants
The power management integrated circuits operate across a 2.7 V to 5.5 V input voltage range, aligning with common automotive low-voltage power domains. ROHM states that the configurable architecture supports multiple performance classes without requiring complete redesigns between vehicle platforms.

For lower-power SoCs, the BD96803QxxC and BD96811FxxC are intended for standalone deployment. These configurations target sensing cameras, body control modules, and sensor control systems where current demand is lower and board complexity must remain constrained.

Mid-tier compute applications such as surround-view systems and parking assistance can use intermediate configurations.

For higher-performance SoCs, including ADAS domain controllers, cockpit integration systems, and driver monitoring processors, the BD96805QxxC and BD96806QxxC can be paired with the BD96340MFFC DrMOS stage. ROHM specifies support for external Driver MOS configurations delivering up to 40 A output capability in certain PMIC variants, addressing the high-current requirements associated with modern application processors.

Reliability and Automotive Qualification Requirements
All devices in the announced architecture are AEC-Q100 qualified, indicating semiconductor qualification for automotive environmental and reliability requirements.

The PMICs are packaged in wettable flank QFN formats, which improve automated optical inspection capability during board assembly. The DrMOS uses a flip-chip QFN package, a packaging approach commonly selected to reduce parasitic resistance and improve thermal performance in dense power designs.

ROHM also notes ISO 26262 process compliance support for relevant PMIC families, an increasingly important requirement for functional safety-oriented automotive compute platforms.

Why Scalable Automotive Power Management Matters
Modern vehicle compute architectures increasingly resemble embedded server platforms, where processor families evolve faster than vehicle development cycles.

A reusable scalable power architecture reduces redesign burden when migrating between processor generations or feature tiers. Instead of requalifying entirely new power trees for each vehicle variant, engineering teams can reuse validated architectural building blocks.

This is particularly relevant for digital supply chain efficiency in automotive electronics development, where component reuse and validation reduction can shorten platform engineering timelines.

The configurable sequencing and multi-rail control also address practical SoC requirements, since automotive processors frequently require tightly ordered startup and shutdown behavior to avoid fault conditions.

Additional Context
This section details technical specifications and competitive benchmarking not included in the original news release.

ROHM’s configurable approach aligns with the broader industry movement toward scalable automotive PMIC platforms for centralized vehicle compute. Comparable solutions exist from semiconductor suppliers such as Texas Instruments and NXP, which also provide automotive-qualified PMIC architectures for ADAS and domain controller applications.

ROHM’s differentiator is its modular PMIC-plus-DrMOS scaling model, allowing a single architecture to span lower-power sensing applications through higher-current domain controller deployments. The platform supports output scalability up to 40 A with external driver configurations, along with programmable power sequencing via OTP, EEPROM, or I2C and switching frequencies up to 4 MHz in certain variants. These specifications place the architecture within the performance range expected for contemporary automotive SoC power management solutions.

Edited by Aishwarya Mambet, Induportals Editor, with AI assistance.

www.rohm.com