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Renesas Launches Pin-Compatible 64-Bit MPUs for Advanced HMI & IoT

RZ/G3L and RZ/G3SE combine up to four Cortex-A55 cores, 1 mW standby power, PCIe and TSN Ethernet for scalable edge systems.

  www.renesas.com
Renesas Launches Pin-Compatible 64-Bit MPUs for Advanced HMI & IoT

Renesas Electronics has introduced the 64-bit RZ/G3L and RZ/G3SE microprocessor series, integrating heterogeneous computing cores with dedicated hardware power-gating architectures. The devices target industrial automation, smart retail terminals, medical human machine interfaces, electric vehicle supply equipment, and edge-connected digital supply chain infrastructure.

Heterogeneous Processing Architecture and Memory Integrity
Embedded systems increasingly require balanced application processing alongside deterministic real-time control. The RZ/G3L and RZ/G3SE microprocessors implement a multi-core topology containing up to four 64-bit Arm Cortex-A55 cores operating at clock frequencies up to 1.2 GHz for high-level software stacks. An integrated Arm Cortex-M33 microcontroller core operating at 200 MHz manages real-time input-output operations and system supervision.

System reliability in high-interference operating environments is governed by memory protections. The processor architecture incorporates hardware error checking and correction across internal memory structures as well as external 16-bit DDR4 and LPDDR4 memory interfaces operating at up to 2133 MT/s. To withstand demanding environmental conditions, the physical silicon is rated for junction operating temperatures spanning minus 40 degrees Celsius to 125 degrees Celsius.

Power Management and Fast-Wakeup Operating States
Continuous-operation Internet of Things endpoints frequently face stringent thermal and power budgets. The third-generation RZ/G silicon architecture integrates a proprietary power management unit that lowers static power draw to approximately 1 mW when placed in deep standby mode.

This low-power state maintains the volatile memory contents of the operating system. When external events trigger an interrupt, the processor resumes Linux kernel execution without requiring a complete cold-boot sequence. This operating behavior supports battery-backed or energy-constrained nodes that demand rapid network responsiveness and continuous telemetry readiness.

Graphics Acceleration and Functional Scalability
To support varying visual display specifications while preserving printed circuit board layouts, the RZ/G3L and RZ/G3SE are pin-compatible. Hardware engineers can route a single board layout to support either headless control systems or high-resolution graphic interfaces. Both processor variants are offered in either a 14 mm square 400-pin LFBGA package or a 17 mm square 368-pin LFBGA package.

The RZ/G3L variant incorporates an Arm Mali-G31 graphics processing unit running at 600 MHz and an integrated H.264 video encoding and decoding hardware accelerator. This configuration handles full HD 1080p video streams and 3D user interfaces for interactive equipment like medical diagnostic displays and retail point-of-sale systems. The RZ/G3SE omits the 3D graphics hardware and video codec, operating as an optimized engine for headless industrial gateways, smart utility monitors, and basic status displays found in electric vehicle chargers.


Renesas Launches Pin-Compatible 64-Bit MPUs for Advanced HMI & IoT

High-Speed Peripheral Expansion and Industrial Networking
Field-deployed industrial IoT ecosystem hardware requires deterministic communication channels and modular expansion bus options. The processors incorporate a single-lane PCI Express Gen 2 controller, allowing direct board-level attachment to 5G cellular modems, Wi-Fi 6 transceivers, or specialized machine learning acceleration chips.

Network communication is provided through two Gigabit Ethernet controllers equipped with Time-Sensitive Networking protocol capabilities. Time-Sensitive Networking establishes bounded latency and deterministic packet delivery across industrial Ethernet backbones. Hardware security subsystems include Renesas Secure IP, cryptographic acceleration for AES and RSA standards, Arm TrustZone partitioning, secure boot verification, and physical tamper detection circuitry.

Ecosystem Support and Long-Term Software Maintenance
Software development is supported through pre-integrated graphic user interface environments, operating systems, and certified system-on-modules. Compatible graphics frameworks include LVGL, Embedded Wizard, Slint, Candera, Spyrosoft, and Qt Group tools. Real-time control and embedded operating system options encompass Zephyr RTOS alongside production Linux implementations.

Software maintenance requirements are addressed through the Renesas Verified Linux Package, which aligns with the Civil Infrastructure Platform. This compliance guarantees long-term Linux kernel maintenance, security patches, and software stability over multi-decade industrial deployment cycles.

Hari Pendurty, Vice President of the EP Edge AI and Application Processors Business Division at Renesas, stated that balancing computing throughput, power consumption, and connectivity requires leveraging a shared hardware platform across varying functional tiers.

Additional Context:
This section details technical specifications and competitive benchmarking not included in the original product announcement

The RZ/G3L and RZ/G3SE enter an embedded 64-bit MPU segment primarily benchmarked against the Texas Instruments AM62x family and the NXP Semiconductors i.MX 93 processor family.

Texas Instruments offers the AM625 processor, which integrates up to four Arm Cortex-A55 cores clocked up to 1.4 GHz, an Arm Cortex-M4F coprocessor, and an Imagination AXE-1-16M 3D GPU. While the AM625 provides single-lane PCIe Gen 2 and dual TSN Gigabit Ethernet interfaces similar to the RZ/G3L, its baseline low-power standby draw typically hovers between 5 mW and 10 mW in sustained low-power retention states, compared to the 1 mW target achieved by the Renesas architecture.

NXP Semiconductors addresses low-power edge gateways using the i.MX 93 processor line, built on dual Cortex-A55 cores at up to 1.7 GHz alongside an integrated Arm Ethos-U65 microNPU. The i.MX 93 emphasizes on-device neural network acceleration over advanced user interfaces, utilizing a 2D PXP engine rather than a full 3D graphics accelerator like the Mali-G31 found in the RZ/G3L. Additionally, the i.MX 93 lacks native PCI Express lanes, constraining modular expansion to USB or SDIO buses.

By delivering quad-core Cortex-A55 processing, an optional 3D GPU, native PCIe Gen 2, TSN dual Ethernet, and a sub-milliwatt deep standby tier on a shared footprint, the Renesas platform establishes a middle ground between dedicated display controllers and low-power headless communications gateways.

Edited by Natania Lyngdoh, Induportals editor, assisted by AI.

www.renesas.com

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