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MediaTek develops chip using TSMC's 2nm process
Compared to the N3E process, N2P offers an 18% performance increase at the same power, a 36% power reduction, and a 1.2x increase in logic density.
www.mediatek.com
MediaTek has announced that it is among the first companies to partner with TSMC to successfully develop a chip featuring the enhanced N2P process, taping out MediaTek’s flagship system-on-chip (SoC) with volume production expected late next year. Marking a new milestone in the strong partnership between MediaTek and TSMC, this long-standing collaboration continues to yield high performance, power-efficient chipsets for customers in flagship mobile, compute, automotive, data center applications and more.
TSMC’s 2nm technology is the first to adopt nanosheet transistor structure, and N2P represents the next evolution in the 2nm family, set to deliver improved performance and power efficiency. The first chipset utilizing the new TSMC N2P process is expected to be available in late 2026.
Compared with the current-generation N3E process, N2P users can expect to see as much as an 18 percent increase in performance at the same power, an approximately 36 percent power reduction at the same speed, and a 1.2x increase in logic density.
“N2P represents a significant step forward in the nanosheet era for TSMC, demonstrating our relentless dedication to fulfilling our customers’ needs – tuning and improving our technologies to deliver energy-efficient computing capability,” said Dr. Kevin Zhang, Senior Vice President of Business Development and Global Sales and Deputy Co-COO of TSMC. “Our ongoing collaboration with MediaTek focuses on maximizing enhanced performance and power capabilities across a wide range of applications.”
www.mediatek.com
TSMC’s 2nm technology is the first to adopt nanosheet transistor structure, and N2P represents the next evolution in the 2nm family, set to deliver improved performance and power efficiency. The first chipset utilizing the new TSMC N2P process is expected to be available in late 2026.
Compared with the current-generation N3E process, N2P users can expect to see as much as an 18 percent increase in performance at the same power, an approximately 36 percent power reduction at the same speed, and a 1.2x increase in logic density.
“N2P represents a significant step forward in the nanosheet era for TSMC, demonstrating our relentless dedication to fulfilling our customers’ needs – tuning and improving our technologies to deliver energy-efficient computing capability,” said Dr. Kevin Zhang, Senior Vice President of Business Development and Global Sales and Deputy Co-COO of TSMC. “Our ongoing collaboration with MediaTek focuses on maximizing enhanced performance and power capabilities across a wide range of applications.”
www.mediatek.com
